D-trigger: principle of operation, truth table

Trigger is an elementary device that is a digital machine with two stability states, one of which is assigned the value "1", and the other is assigned a "0".

The following types of devices are distinguished by the way of realization of logical connections: T-flip-flop, D flip-flop, JK flip-flop, RS flip-flops. Naturally, here are listed the most common options, but apart from them there are automatic devices of other types.

In this article we will consider in more detail the D-trigger. The machine has a single information (D) input, so it is designed to implement the time delay function.

Principle of operation

The characteristic equation Q ( _{t + 1} ) = Dt describes the operation of this type of device, such as the D-flip-flop. The truth table ( jump table ) for this digital machine is shown below.

As you can see, in the first and fourth row, the values of the signals Q at the instants of time t and t + 1 coincide. That is, the D flip-flop is an element of the signal delay. As a result, the considered devices of the asynchronous type have not found their application, since the output will repeat the input signal with a small time delay.

The D-trigger of the synchronous type is constructed from single-level (single-stage) and two-level (two-step) RS-devices of the same type. The mentioned automata function according to the transition table.

A single-stage D flip-flop can be executed from a single-level synchronous RS-device and one AND-HE1 element that connects both inverse inputs of the D flip-flop into a single information (D) input.

When a logical zero is input to the synchronizing input, the RS type automatic machine is blocked by the logical unit level from the outputs of the NAND ₂ and NAND ₃ elements. If the synchronization signal is changed, the level fed to the data input will create a logic zero either at the input S (for D = 1) or at the input R (for D = 0) of the asynchronous trigger T. It will switch to a state corresponding to the logic level D. One-step The D-type trigger delays the propagation of the input for a pause time between synchronizing signals.

D-trigger with dynamic control. Description of work, functional diagram

An automatic device of this kind is constructed from three RS-triggers of an asynchronous type. They are built on NAND elements, with two of them performing a commutation function, and the third is output. The output signals of the switching triggers are designed to control the output trigger.

At a signal level C equal to logical zero, a neutral combination of signals enters the inputs of the output trigger and it switches to the storage mode. When the information signal changes, the switching triggers go into the standby mode, and as soon as the signal to the logical unit arrives at the enable input of the trigger C, the output automaton is set to a new state that corresponds to the information signal at the D input in the previous clock cycle.

If the change in the information signal level occurs during the setting of the output flip-flop, then the switching devices will not miss the signal. It turns out that the purpose of switching triggers is to receive information signals, transfer them to the input of the output device at the time of the change of the signal at the control input C from the logical zero to the logical unit and the self-blocking from the action of the signal at the information input.